With mounting complexity and volatile pricing across the semiconductor industry, higher abstraction shift-left methodologies significantly increase your chances of success.
Join the OpenHW Foundation, CircuitSutra, and RISE-DA for a deep dive into effective deployment of shift left methodologies for design and verification of RISC-V based SoC and IPs.
The team explores advanced flows combining virtual platforms with high level synthesis (HLS), which enable progressive validation of functional models, HLS implementation, and RTL using software-driven test cases.
This session demonstrates how to identify any architecture bottlenecks, refine the functional specs, and fine-tune hardware-software partitioning at an early stage to avoid costly re-spins.
You will see how RISE-DA’s Agentic AI Spec to Silicon flow enables early integration and continual validation of HW/SW at various abstractions, fitting into Virtual Platforms and closing the gap.
