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StarRISC: Rad-hard RISC-V for outerspace!

Join Dr Li Chen and Christopher Elash, from the University of Saskatchewan, to explore how their STARRLab team is taking RISC-V from the lab to orbit, with a fully taped-out, space-ready ASIC based on OpenHW Foundation’s CORE-V-MCU.

Join Dr Li Chen and Christopher Elash, from the University of Saskatchewan, to explore how their STARRLab team is taking RISC-V from the lab to orbit, with a fully taped-out, space-ready ASIC based on OpenHW Foundation’s CORE-V-MCU.

Watch the full episode here.

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